Movellus משתפת פעולה עם Synopsys כדי לספק יעילות אנרגיה עבור מעגלים משולבים מהדור הבא

טכנולוגיית השעון האדפטיבית של Movellus זמינה כעת ללקוחות SLM IP של סינופסיס

סנטה קלרה, קליפורניה, 10 במרץ 2026 (GLOBE NEWSWIRE) –

Movellus הכריזה על הכללת טכנולוגיית השעון שלה בתיק ה-IP של Synopsys Silicon Lifecycle Management (SLM), ונותנת מענה ישיר לאתגרי צריכת החשמל העומדים בפני שבבים מורכבים בעידן הבינה המלאכותית. ה-IP של Synopsys SLM Advanced Clock Generator ("ACG") משמש כבסיס לאופטימיזציה של צריכת חשמל בזמן אמת, ומאפשר לארכיטקטי צריכת חשמל להתאים באופן דינמי פרופילי SoC לשינויים סביבתיים ועומסי עבודה, תוך אופטימיזציה של ביצועים והספק. הקשר עם יצרן הציוד המקורי (OEM) מרחיב את גישת הלקוחות לטכנולוגיית השעון האדפטיבית של Movellus דרך ערוצי Synopsys.

Movellus Partners with Synopsys to Deliver Power Efficiency for Next Generation IC’s

Movellus’ adaptive clocking technology is now available to Synopsys SLM IP customers

SANTA CLARA, Calif., March 10, 2026 (GLOBE NEWSWIRE) –

Movellus announced the inclusion of its clocking technology in the Synopsys Silicon Lifecycle Management (SLM) IP portfolio, directly addressing power challenges facing complex chips in the age of AI. The Synopsys SLM Advanced Clock Generator (“ACG”) IP serves as the foundation for real-time power optimization, enabling power architects to dynamically adapt SoC profiles to environmental and workload changes optimizing performance and power. The OEM relationship expands customer access to Movellus’ adaptive clocking technology through Synopsys’ channels.

“As AI and hyperscale workloads push the boundaries of semiconductor complexity, managing power optimization and power integrity has become a key challenge our customers " said Steve Pateras, vice president of SLM product management at Synopsys. "By integrating Movellus' innovative technology into our Silicon Lifecycle Management portfolio, we are providing power architects with a sophisticated, real-time solution to optimize power efficiency.”

The Synopsys SLM ACG IP delivers high-performance, adaptive clock generation for droop mitigation and Dynamic Frequency Scaling (DFS)/Dynamic Voltage and Frequency Scaling (DVFS) applications. The ACG IP provides ultra-fast adaptive clocking, extensive programmability to address varied use cases, and advanced telemetry to monitor droop events, DFS/DVFS transitions, and clock health.

“The combination of Synopsys sensor portfolio and Movellus adaptive clocking IP provides a comprehensive power, thermal, and performance optimization platform to our mutual customers,” said Vikram Karvat, chief operating officer at Movellus. “We’re very excited about where this will take the industry in the future.”

Movellus continues to advance high-performance silicon through feature-rich IP. The Aeonic™ IP platform has been integrated by multiple customers across various process nodes, with applications ranging from performance-centric cloud datacenter compute and AI offerings to ultra-low power edge AI devices. This milestone broadens access to Movellus technology, which when combined with the Synopsys SLM solutions will attract a wider customer base for advanced SoCs, AI accelerators, and processors. The Synopsys SLM ACG IP will be demonstrated at the Synopsys User Group (SNUG) as part of Synopsys Converge 2026, March 11-12 in Santa Clara, California.

About Movellus

Movellus provides critical power and performance optimization technology that is integrated into an array of applications ranging from edge AI devices to performance-centric cloud datacenter compute and networking offerings. The company is headquartered in Santa Clara, CA, with R&D centers in Michigan and Toronto. Visit us at: www.movellus.com

Movellus, the Movellus logo, Aeonic, Aeonic Generate, Aeonic Power, Aeonic Insight, and Intelligent Clock Networks are among the trademarks of Movellus. The term "Movellus" refers to Movellus Circuits Inc and/or its subsidiaries. Other trademarks are the property of their respective owners.

Press Contact: Aakash Jani | [email protected]

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